Advanced Systems Packaging at Georgia Tech: The Leader in US Academic Research for 3 Decades
 

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From NSF Funded ERC to Successful Industry Consortia Under a Leader who Blazed a Trail of Firsts
Professor Rao Tummala and his PRC Team Advance System-On -Package Vs. System-on- Chip Vision as Moore’s Law Reaches its Limit

When Rammohana Rao Tummala, the son of a farmer, left his village in Andhra Pradesh for engineering school, he knew he was a first. The first in his family to achieve higher education, attending Andhra Loyola College in Vijayawada, then the top ranked Indian Institute of Science, Bangalore. He then became the first in his family to leave India for his M.S. degree in Canada and later attained his Ph.D. at the University of Illinois. Now recognized as the father of modern microelectronics packaging innovations, he did not know when he took that first leap across continents, how many times, and in how many ways, he would be a first.

In 1969, Tummala began his career at IBM in New York where he invented and led two major technologies: industry’s first gas panel plasma display and industry’s first 100-chip package .  “My claim to fame at IBM is heading the materials team that invented the first plasma display and manufacturing it. IBM made a fortune with it. An even bigger gain for IBM was his 100-chip MCM invention that he conceived of in 1975, now called “chiplets” in the industry.” Tummala and his large team of researchers and developers conceived and developed a 61-layer glass-ceramic/copper multichip module, now called LTCC in the industry. IBM manufactured this technology in US and in Germany for all its mainframes and servers, from 1992 till 2014, making it the highest value -add package in the history, more than a $100B.  For these and many other contributions, IBM named him its first IBM Fellow in Packaging in 1984, a very prestigious and rare title that IBM awarded to merely one in 10,000 employees. In 1986, he became Director of IBM's Advanced Packaging Research laboratory, responsible for all of IBM's Strategy and Programs in the U.S., Europe, and Japan. At the same time, he was appointed as a member of the National Academy of Engineering and named an IEEE Fellow.

After so many firsts in the corporate arena, Tummala turned his attention to the world of academics, when his youngest son wanted to attend the Georgia Institute of Technology for his undergraduate degree in ECE. Tummala accepted an endowed chair faculty position with the Georgia Institute of Technology to lead a new interdisciplinary research center focused on electronics packaging. Less than a month after his arrival at Georgia Tech, Rao authored and submitted his winning proposal for the first NSF ERC at Georgia Tech, reflecting his vision of System-on Package (SOP) vs. the industry standard System-on-Chip (SOC). In 1994, the National Science Foundation awarded the Georgia Tech 3D Systems Packaging Research Center (3D-PRC) a $35M grant over 11 years to create a pioneering SOP program integrating research, education and industry collaborations. To meet these goals, 20 new faculty were recruited with expertise in every electronics area. Additionally, a first of its kind, a 300 mm panel-size cleanroom room for substrate, assembly, and reliability testing facility at a cost of $47M was established for both research and educational use. He raised more than $ 200M during his tenure at GT from 1993-2018.

Under the leadership of Tummala, the 3D Systems Packaging Research Center began to engage with 50 U.S and global supply-chain companies and the State of Georgia to contribute additional funding for the endeavor. In 1988 while at IBM, Tummala published the first modern handbook in packaging, Microelectronics Packaging Handbook; followed by the first undergraduate level textbook  Fundamentals of Microsystem Packaging (2001). In 2006 he introduced the concept of System-On-Package  design and fabrication with the publication of Introduction to System-on-Package, and in 2020 the second edition of Fundamentals of Device and Systems Packaging was released.

Due to Tummala’s extensive outreach and collaboration with educational and industry entities from the U.S., Europe and Asia coupled with the stellar research record during the 11 years of NSF funding, the 3D-PRC evolved into a successful global industry consortium involving researchers, developers, users and supply-chain manufacturing companies. The consortia focused on the development of many  new technologies, all focused on the concept System-On-Package (SOP), a process of scaling electronics systems for highly functional yet smaller and cheaper  systems such as modern smartphones.

In 2018 after educating more than 400 Ph.D., 450 M.S. and 300 B.S. students in packaging technologies, Tummala passed the directorship flame and retired. In 2019, based on an international search, Prof. Madhavan Swaminathan was appointed as the next Director of PRC, which celebrated its 25^th anniversary the following year. The 3D-PRC is a model of what a successful government, academic and industry partnership can achieve, however it is fair to say that it would not exist at all without the many firsts of Emeritus Professor and innovative thinker Rao Tummala.

 

• Christa M. Ernst

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Packaging History - Learn More 
Read the research basis for the plasma display technology
Tummala R.R. (1978) Application of Borate Glasses in Electronics. In: Pye L.D., Fréchette V.D., Kreidl N.J. (eds) Borate Glasses. Materials Science Research, vol 12. Springer, Boston, MA. https://doi.org/10.1007/978-1-4684-3357-9_35
 

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Tummala’s Achievements Recognized by the Prestigious Engineering Society
IEEE Technical Field Award Renamed After Microelectronics Packaging Trailblazer Rao R. Tummala

The IEEE Electronics Packaging Award, an IEEE Technical Field Award (TFA) established in 2002, has been renamed in honor of a visionary in technology—Professor Rao R. Tummala. The award will be called IEEE Rao Tummala Electronics Packaging Award

The IEEE Electronic Packaging Society (EPS) partnered with the IEEE Foundation and the IEEE Awards Board to secure philanthropic support and rename the award to create a lasting legacy of Tummala through the work of the recipients of the IEEE Rao R. Tummala Electronics Packaging Award. "From time to time, the name of an IEEE Award will be changed to better represent the award scope or take the name of a technologist who has done outstanding work in that field," said IEEE Awards Board Chair, Karen Panetta. "Rao R. Tummala is a visionary innovator and educator in the field of electronics packaging, and I can't think of a better eponym for this IEEE Technical Field Award."

Nearly fifty colleagues, friends, and corporations made commitments and were joined by EPS in making philanthropic investments enabling the renaming of the Award to honor Tummala. The renamed award will be presented for the first time in 2022 to innovators around the world for their outstanding contributions to advancing components, electronic packaging or manufacturing technologies.
 

Recognized as the father of modern packaging innovations that have revolutionized microelectronics packaging, Professor Tummala has provided unparalleled leadership in industry, academia, professional societies and in packaging research, technology development, manufacturing, and products, as well as in education and in industry-academic collaboration.

Read the IEEE press release and nominate a colleague here.

 

Meet Packaging Superstar Muhannad S. Bakir | Dan Fielder Professor, School of Electrical and Computer Engineering & PI of the Integrated 3D Systems Group

Research Overview
The Integrated 3D Systems (I3DS) Research Group at Georgia Tech explores the design and technologies to enable ultra-dense 3D ICs and polylithic-integrated circuits to address the disparity in performance and energy dissipation of traditional interconnects/packaging (data movement) relative to computation. Specifically, the group focuses on the (co)design, fabrication, and characterization of chip-level electrical, optical, and thermal interconnect networks and heterogeneous integration architectures (including 2.5D and 3D architectures) to solve the power delivery, off-chip communication, and cooling needs of future high-performance and energy efficient computing systems and enable the next phase of Moore’s Law. Such 2.5D and 3D architectures are also being utilized for mm-wave electronics by the group.
 
More recently, the group has been exploring in-vivo flexible electronics for electromyogram (EMG) recordings in various species (song birds and mice) in collaborations with Emory University to help better understand how the brain coordinates muscle activity to produce behavior. The key enabling technologies for single-unit spike train measurements from muscles include dense lithographically defined 3D electrode arrays with integrated electronics on flexible polymer films. 
 
Awards of Note

Teamwork: Bakir and his research group have received more than thirty paper and presentation awards including six from the IEEE Electronic Components and Technology Conference (ECTC), four from the IEEE International Interconnect Technology Conference (IITC), and one (best invited paper) from the IEEE Custom Integrated Circuits Conference (CICC). Dr. Bakir’s group was awarded Best Paper Awards from the 2014 and 2017 IEEE Transactions on Components Packaging and Manufacturing Technology (TCPMT).
 
Leadership in Research: Dr. Bakir is the recipient of the 2013 Intel Early Career Faculty Honor Award, 2012 DARPA Young Faculty Award, 2011 IEEE CPMT Society Outstanding Young Engineer Award, and was an Invited Participant in the 2012 National Academy of Engineering Frontiers of Engineering Symposium.  Dr. Bakir is the recipient of the 2018 IEEE Electronics Packaging Society (EPS) Exceptional Technical Achievement Award "for contributions to 2.5D and 3D IC heterogeneous integration, with focus on interconnect technologies." Bakir also received a 2018 McKnight Foundation Technological Innovations in Neuroscience Award, for “flexible electrode arrays for large-scale recordings of spikes from muscle fibers in freely behaving mice and songbirds”.

 
Teaching Excellence: In 2020, Dr. Bakir was the recipient of the Georgia Tech Outstanding Doctoral Thesis Advisor Award. Bakir is also the recipient of several teaching awards, including the 2014 and 2015 Georgia Institute of Technology Class of 1940 Course Survey Teaching Effectiveness Award, and the 2020 Student Recognition of Excellence in Teaching: Class of 1934 Award. 
 
Current Lab Sponsors & Programs

• AFRL: exploring 2.5D and 3D heterogeneous integration technologies for electronics and photonic technologies.
• NSF: Exploring 2.5D polylithic technologies for digital systems.
• NIH: exploring flexible, high SNR, and high-density electrodes for single-motor unit EMG recordings from muscles.
• JUMP ASCENT {DARPA and SRC}: exploring ultra-fine grain 3D heterogeneous integration for neuromorphic computing.
• JUMP ComSenTer {DARPA and SRC}: new materials and packaging for mm-wave and THz electronics.
• GTRI: advanced heterogeneous integration for photonic and RF electronics.
• Other industry support for advanced packaging.

Recent Publications of Note

M. -J. Li et al., "Cu–Cu Bonding Using Selective Cobalt Atomic Layer Deposition for 2.5-D/3-D Chip Integration Technologies," in IEEE Transactions on Components, Packaging and Manufacturing Technology, vol. 10, no. 12, pp. 2125-2128, Dec. 2020.
Abstract: The feasibility of using selective thermal cobalt metal (Co) atomic layer deposition (ALD) as high density Cu–Cu interconnect bonding is demonstrated at a low temperature (200 ◦C) and with minimal surface pretreatment. This is the first time demonstration of gas-phase deposition of chip I/Os
 
M. Zia, B. Chung, S. Sober, M. S. Bakir, "Flexible Multielectrode Arrays With 2-D and 3-D Contacts for In Vivo Electromyography Recording," IEEE Transactions on Components, Packaging and Manufacturing Technology, vol. 10, no. 2, pp. 197-202, Feb. 2020.
Abstract: We present a system for recording in vivo electromyographic (EMG) signals from songbirds using hybrid polyimide–polydimethylsiloxane (PDMS) flexible multielectrode arrays (MEAs). 3-D MEAs were fabricated using a photoresist reflow process to obtain hemispherical domes utilized to form the 3-D electrodes. EMG activity was recorded from the expiratory muscle group of anesthetized songbirds using the fabricated 2-D and 3-D arrays. Air pressure data were also recorded simultaneously from the air sac of the songbird. Together, EMG recordings and air pressure measurements can be used to characterize how the nervous system controls breathing and other motor behaviors. Such technologies can in turn provide unique insights into motor control in a range of species, including humans. An improvement of over 7× in the signal-to-noise ratio (SNR) is observed with the utilization of 3-D MEAs in comparison to 2-D MEAs.

P. Jo, S. Kochupurackal Rajan, J. Gonzalez and M. S. Bakir, "Polylithic Integration of 2.5-D and 3-D Chiplets Enabled by Multi-Height and Fine-Pitch CMIs,” in IEEE Transactions on Components, Packaging and Manufacturing Technology, Jul.2020.
Abstract: A polylithic integration technology called heterogeneous interconnect stitching technology (HIST) is explored. HIST provides both 2.5-D and 3-D integration capabilities enabled by multi-height and fine-pitch compressible microinterconnects (CMIs). A testbed is fabricated and assembled in order to demonstrate the key features of the proposed technology: the assembly of an anchor chip with multi-height CMIs (65 and 35 µm in height) onto a substrate with a surface-embedded chip (52 µm in thickness) and mechanical bonding using solder bumps. Fine-pitch CMIs (30 µm × 30 µm) are also fabricated and demonstrated in order to meet an ever-growing need for higher I/O densities for high-performance computing systems.

Visit the Lab Website Here

Nanoscribe Photonics 3D Printer Upgrade – GT to GT2


“With this relaunch of our extremely successful generation of Photonic Professional devices, we have now succeeded in overcoming previous physical limitations and increasing the performance of the devices by a factor of up to 10 in terms of productivity and speed," 
 
 - Martin Hermatschweiler
 
They have also noted that the maximum print size in the Z direction has increased from 2mm to 8mm allowing for much larger parts to be constructed without sacrificing the resolution that comes with 2-Photon-Polymerization. With this tool they are introducing a new resist to print these large structures called IP-Q. This resist is aimed at microfluidic “lab on a chip” development where researchers will be able to rapidly prototype different microfluidic chambers to assist with their designs. We hope with this new addition to the Marcus Cleanrooms, we will be able to provide solutions to researchers who are working in this new field of medicine & POC devices.
 
We are currently scheduled for the upgrade installation on June 22^nd, but are working to get this upgrade moved to later this month!